TSMC Advanced Semiconductor Foundry (1987)
infrastructure pace layer · 1987–ongoing
lifespan: 100 yrs · motor: push
Class card for Taiwan Semiconductor Manufacturing Company (TSMC) — the world's first and dominant dedicated pure-play semiconductor foundry. Founded February 21, 1987 in Hsinchu Science Park, Taiwan by Morris Chang (recruited by Taiwan government from Texas Instruments / General Instrument). TSMC invented the pure-play foundry model: fabricate customer chip designs without competing in the design space (vs. the integrated IDM model of Intel, Samsung). The foundry-as-service grammar made fabless chip design possible at scale (Qualcomm, AMD, Apple, Nvidia, Broadcom all run fabless or near-fabless because TSMC exists). By 2024: ~$69B revenue, ~92% of world sub-7nm advanced logic capacity, 3nm node (N3, 2022), 2nm node (N2) targeted 2025-2026, capex $38-42B/yr guidance 2025. TSMC is the canonical DM-Day heavy infrastructure machine at the intersection of Wallerstein geo semi_periphery (Taiwan) and functional core (irreplaceable chokepoint for global advanced logic supply). This Wallerstein split is the SCHEMA STRESS case from atlas §3.1 finding 2. TSMC is singularly load-bearing in the semiconductor graph: it is simultaneously a black_hole_dependency TARGET (ASML EUV monopoly → TSMC; no EUV alternative at sub-7nm) and a black_hole_dependency SOURCE for every fabless chip designer (Apple Silicon, Nvidia GPU, AMD CPU all exit if TSMC fab capacity is disrupted). This dual position makes TSMC the canonical gravitational black hole of the DM-Day semiconductor cluster. Three sub-phases: DM-Dawn 1987-2000 (pure-play model founded; 1µm→0.18µm process; first commercial wafers 1988; foundry-model validation period); DM-Day-early 2000-2015 (node leadership 45nm→28nm→16nm FinFET; AMD spun off GlobalFoundries 2009; Apple iPhone A8 2014 on TSMC 20nm — Apple lock-in begins); DM-Day-mid 2015-2026 (7nm 2018, 5nm 2020, 3nm 2022, 2nm 2025e; Apple Silicon M1 2020; Nvidia AI chips; Arizona Phoenix Fab 21 2020+; US CHIPS Act 2022 $52.7B + TSMC $40B→$65B Arizona commitment; Taiwan-Strait geopolitical stress 2024+; pace_layer_mismatch_stress true: geopolitical pace overtaking infrastructure pace). dm_current: late_modernity — energetic-zombie diagnostic: TSMC has massive, growing capacity ($40-50B capex/yr 2024) but its evolutionary future is actively contested by geopolitical stress (US-China decoupling, Taiwan-Strait sovereignty risk, US CHIPS Act onshoring pressure, SMIC China catch-up strategy). Moore's Law continuation is the public-good output but the machine operates under intensifying geo-constraint that caps its evolutionary intelligence. Sources: Miller, Chip War (2022); TSMC Annual Report + 20-F filings 2020-2024; Chang autobiography (Morris Chang); SIA Semiconductor Industry Association reports 2022-2024; US CHIPS Act public record 2022; Miller/Mims semiconductor supply-chain analyses.
Machine type
corporeal
Plasticity
plastic
Substrate
Wave source
wave9-atlas-dm14-cluster-i-cloud-semiconductor
Inputs
- asml_euv_lithography_machines
- silicon_wafers_and_ultra_pure_chemicals
- electricity_taiwan_grid_load
- phd_engineers_and_process_recipe_talent
Outputs
- advanced_logic_chips_3nm_2nm
- global_sub7nm_capacity_public_good
- tsmc_revenue_cash_flow
Landscape pressures
- us_china_technology_decoupling_export_controls (88% intensity)
- taiwan_strait_geopolitical_sovereignty_risk (82% intensity)
- onshoring_diversification_pressure_chips_act (70% intensity)
- asml_euv_single_point_of_failure_supply_risk (85% intensity)
- moores_law_physical_limits_angstrom_era (65% intensity)
Intra-era couplings
- black_hole_dependency ASML EUV Lithography Monopoly (2019) · 0.95 CANON
- serves Apple Device-Services Complex (1984) · 0.90 CANON
- serves OpenAI Foundation Model Lab (2015) · 0.82 CANON
- chip_source AWS Cloud Infrastructure (Amazon Web Services, 2006) · 0.78 CANON
- withholds_from SMIC China Semiconductor Foundry (2000) · 0.88 CANON
Cross-era couplings
- substrate_provision National Electrical Grid (Insull / US Grid, 1882–ongoing) · 0.90 CANON
- substrate_provision Bell System / AT&T (1876–1984) · 0.92 CANON
- adapted_inheritance Industrial-Era Patent System (1790) · 0.72 CANON
- substrate_provision Meiji Japanese State (1868–1912) · 0.60
State variables
Phase snapshots
Notable instances
- TSMC Fab 12 (Hsinchu Science Park) (1996) — Hsinchu Science Park Fab 12 — the anchor 300mm fab. TSMC's flagship Taiwan manufacturing site and the original home of i…
- TSMC Arizona Phoenix Fab 21 (2020) — Announced 2020; $40B → expanded to $65B commitment by 2024 under US CHIPS Act ($6.6B direct grant + $5B loan announced 2…
- TSMC Japan Kumamoto Fab (JASM) (2024) — Japan Advanced Semiconductor Manufacturing (JASM) — TSMC Kumamoto Fab opened 2024. $8B+ investment; Sony + Toyota as JV …
- 3nm Node N3 (2022) (2022) — TSMC N3 3nm node — mass production 2022 (Apple A17 Pro in iPhone 15 Pro). First commercial 3nm node. FinFET + enhanced d…
- 2nm Node N2 (2025e) (2025) — TSMC N2 2nm node — Gate-All-Around (GAA) nanosheet transistor architecture; targeted 2025 HVM. Backside power delivery i…
- CoWoS Advanced Packaging (2012/2022 ramp) (2012) — Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging — TSMC's HBM integration platform. Critical for Nvidia H100/H200 A…
Sources
- Miller, Chris (2022). Chip War: The Fight for the World's Most Critical Technology · 92%
- TSMC (2024). Annual Report / 20-F filings (2020–2024) · 90%
- Chang, Morris (2013). Morris Chang autobiography + TSMC founding interviews · 88%
- SIA (2024). Semiconductor Industry Association State of the Industry Report 2023-2024 · 85%
- Atlas (Prime Radiant) (2026). research/09-atlas/dm-mm-industrial-stubs/findings.md DM-14 · 88%